! ###############################################################
! ###############################################################
! ###                                                         ###
! ###  IOMD DBUS - Data Bus merge block                       ###
! ###                                                         ###
! ###  Created 01/9/92: David Flynn                           ###
! ###                                                         ###
! ###                                                         ###
! ###############################################################
! ###############################################################
! ###  Revision History:                                      ###
! ###   01/9/92: DWF : created with 0.1 spec                  ###
! ###   13/10/92 WHO:  delayed back edge of dmagoing for Nendout generation ###
! ###   20/10/92 AS :  Delayed front edge as well...          ###
! ###   23/10/92 AS : Fixed for DMA transfers (dwrite inverted ##
! ###   26/10/92 AS : Removed redundant inverter             ###
! ###   28/10/92 AS : Moved to new split bus enable system   ###
! ###############################################################

FROM iomd.dbusc            IMPORT  $DBUSC

FROM StdParts.TriDrive     IMPORT  $BBuff
FROM StdParts.Gates        IMPORT  $BGate1

CONST DBTOUT = ns_5
CONST DBTENO = ns_3
CONST DBTHIZ = ns_5
CONST DBTIN  = ns_2

BLOCK DBUS(
  {IN}  rclk,
  {IN}  iomddec,   ! from ADEC
  {IN}  iodec,     ! from ADEC
  {IN}  io32dec,   ! from ADEC
  {IN}  lwrite,    ! from ADEC
  {IN}  dmagoing,  ! from BUSCTL
  {IN}  dwrite,    ! from DAG
  {IN}  dmach[2:0],! from BUSCTL
  {IN}  dsize[1:0],! from DAG
  {IN}  din[31:0], ! from PADS
  {IO}  d[31:0],   ! to <all over>
  {OUT} dout[31:0],! to PADS
  {OUT} Nendoutlo, ! to PADS
  {OUT} Nendouthi,  ! to PADS
  {OUT} dbe         ! to PADS
)

 dbusc = $DBUSC(
  {IN}  rclk,
  {IN}  iomddec,
  {IN}  iodec,
  {IN}  io32dec,
  {IN}  lwrite,
  {IN}  dmagoing,
  {IN}  dwrite,
  {IN}  dmach[2:0],
  {IN}  dsize[1:0],
  {OUT} Nwbufen,
  {OUT} Nendoutlo,
  {OUT} Nendouthi,
  {OUT} dbe
)
  WITH (delay=ns_10)


! Should have sticky latches on d[31:0]
! (ASim kernel should provide weak bus repeat for $BBuff)
 dinbuf  = $BBuff(din[31:0], Nwbufen)=> d[31:0]
            WITH (delay=(prop=DBTOUT, enable=DBTENO, HiZ=DBTHIZ))

 dbuf   = $BGate1(d[31:0])=> dout[31:0] WITH (op=BUFF, delay=DBTIN)

END {DBUS}
